1.  List the steps for converting a truth table to a circuit.

2.  Why are NAND and NOR know as complete gates?

3.  Define combinational circuit.

4.  What is the formula for the number of data lines for a given number of control lines for a multiplexer?

5.  What is the formula for the number output lines for a given number of control lines for a decoder?

6.  What is the relationship between output lines and control lines for a decoder?

7.  If four memory chips are selected by a decoder, which address lines will be wired to the decoder in order to select one of the chips?

8.  How can an 8-bit adder be built from single bit adders?

9.  Draw the circuit for a carry select adder.

10.  Why does the ALU have two function control lines?

11.  What additional functions are possible with the use of ENA, ENB, INVA?

12.  How can an asymmetric clock cycle be generated from symmetric clocks?

13.  What happens to an SR Latch when S=R=0?

14.  What happens to an SR Latch when S=1 and R=0?

15.  What happens to an SR Latch when S=0 and R=1?

16.  Why add a clock to a latch?

17.  What happens to an SR Latch when S=1 and R=1?

18.  How does a D Latch prevent an unstable state?

19.  How long will a latch remember its state?

20.  What is the advantage of a flip-flop over a latch?

21.  Why do all the flip-flops share the clock and clear symbols in an 8-bit register?

22.  Explain why the 12-bit memory of Figure 3-28 has fewer pins than an 8-bit register.

23.  What type of circuit is used to select one of the words in the memory based on the address lines?

24.  Why is it possible for the memory chip to share input and output lines?
25.  How is a noninverting buffer different from other circuits?

26.  What is the purpose of the CS line in the memory chip of Figure 3-30 (a)?

27.  What is the purpose of the WE line in the memory chip of Figure 3-30 (a)?

28.  What is the purpose of the OE line in the memory chip of Figure 3-30 (a)?

29.  What can be done to speed up a chip like the one in Figure 3-30 so that every memory read does not require two cycles?

30.  What type of circuits are used to make SRAM?

31.  How is a DRAM memory cell constructed?

32.  Why does DRAM need to be refreshed?

33.  Why do DRAM have a higher density than SRAM?

34.  How fast is DRAM?

35.  Why is synchronous RAM an improvement over asynchronous RAM?

36.  How does DDR improve SDRAM?

37.  How does DDR2 improve DDR?

38.  How does DDR3 improve DDR2?

39.  How often can ROM be changed?

40.  What is the advantage of PROM over ROM?

41.  How is an EPROM erased?

42.  EPROM are organize like what other memory?

43.  What are two advantages of EEPROM over EPROM?

44.  What are two disadvantages of EEPROM over EPROM?

45.  How does Flash memory erase differently than EEPROM?

46.  Name two advantages for using Flash over mechanical disk drives.

47.  Name a disadvantage for using Flash over mechanical disk drives.

48.  What is an advantage of FPGA over Integrated Circuits?